Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Multicore processors are generally made up of multiple processor cores with interconnections between the individual cores. Some architectures for interconnecting individual cores support communication between neighboring cores with high efficiency. However, communications between nonadjacent cores within the multicore processor may incur delays due to passing messages between intermediate cores. As core counts within multicore processors increase, optimization of communication between cores becomes increasingly important. These communications may include messages querying the level load on the different cores within the multicore processor.
Dynamic voltage and frequency scaling (DVFS) is a power management technique where voltages and/or clock frequencies associated with a processor are adjusted to manage heat generation and power consumption. Dynamic voltage scaling can decrease the voltage applied to a processor in order to conserve power. This may be particularly useful in laptop computers and other types of battery powered mobile devices. Dynamic voltage scaling can increase the voltage applied to a processor in order to increase computer performance. Dynamic frequency scaling can decrease, or even pause, the clock frequency of the processor in order to decrease power consumption.
Attempts to apply DVFS to individual cores within a multicore processor may encounter a number of difficulties as the number of cores increases. For example, obtaining steady and up-to-date information on the computation load or power required by each core through message queries to the cores can scale into a performance limitation for the multicore processor.